Publication
Conferences
- W. Zuo, H. Zheng, and D. Chen, “New Solutions for System-Level and High-Level Synthesis,” Proceedings of IEEE International Symposium on Integrated Circuits, December 2014. (Invited)
- S. Gurumani, J. Tolar, Y. Chen, E. Liang, K. Rupnow, D. Chen, “Integrated CUDA-to-FPGA Synthesis with Network-on-Chip,” Proceeding of IEEE International Symposium on Field-Programmable Custom Computing Machines, 11-13 May, 2014.
- H. Zheng, S. Gurumani, K. Rupnow, D. Chen, “Fast and effective placement and routing directed high-level synthesis for FPGAs,” Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA), 26-28 Feb. 2014
- H. Zheng, S. Gurumani, L. Yang, D. Chen, K. Rupnow, “High-level Synthesis with Behavioral level Multi-Cycle Path Analysis,” Proceedings of IEEE International Conference on Field Programmable Logic and Applications, September, 2013.
Journal
- H. Zheng, S. Gurumani, L. Yang, K. Rupnow, D. Chen, “High-level Synthesis with Behavioral-level Multi-cycle Path Anlaysis”, IEEE Transactions on Computer-Aided Design of Integrated Circuits. (Submitted)
- Y. Liang, MT. Satria, K. Rupnow, D. Chen, “An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization”, IEEE Transactions on Very Large Scale Integration Systems. (Submitted)