About me


I am a Ph.D. student at the University of Illinois, Urbana-Champaign, and my research advisor is Prof. Sarita Adve.

My primary research interest is in computer architecture. However, I am also interested in topics across the computing stack — from systems to devices.

Before starting my Ph.D., I worked at Intel Corporation as part of the IoT group. I was responsible for pre-silicon and post-silicon validation for the 4G/5G modem projects and later, the Movidius VPU hardware accelerators.

Before Intel, I received my B. Tech. in Electronics and Communication Engineering from Vellore Institute of Technology in 2017.

My CV is available here. Reach me by email at vv15@illinois.edu.

Research


As part of my current research, I am currently working on the Spandex project. We are designing flexible cache coherence protocols for heterogeneous processors, that improve performance and reduce data movement. As part of the evaluation, we are also implementing the Spandex coherence protocol in hardware, and the latest release has been integrated with ESP — the open-source research platform for heterogeneous SoC’s from Columbia University.

[Spandex on GitHub]

Publications


    • T. Shankar, G. Eappen, V. Suresh, and A. Rajesh, “Contrast Enhancement Using Quantile Separation and Bi-Histogram Equalization”, IEEE Conference on Innovations in Power and Advanced Computing Technologies (iPACT), 2019

Other Projects


Dense GEMM accelerator: Designed using ESP, as a course project for Parallel Computer Architecture (CS533). [GitHub]

Miscellaneous