Addressing Energy Inefficiencies in Datacenter Infrastructure

Abstract: This talk will describe how to improve the energy efficiency of datacenter computations, including data processing, storage, and communication. It will present some of the work that is being done in the context of the SRC/DARPA JUMP 2.0 ACE Center for Evolvable Computing. 

Bio: Josep Torrellas is the Saburo Muroga Professor of Computer Science at the University of Illinois Urbana-Champaign (UIUC). He is the Director of the SRC/DARPA ACE Center for Evolvable Computing, past Co-Leader of an Intel Strategic Research Alliance (ISRA) on Computer Security, and past Director of the Illinois-Intel Parallelism Center (I2PC). His research interests are computer architectures for shared-memory multiprocessors and parallel computing. Some of his contributions include thread-level speculation (TLS) architectures, the Bulk Multiprocessor concept, deterministic record and replay mechanisms, process variation mitigation techniques, and hardware defenses against speculative execution attacks. In addition, he has contributed to several experimental multiprocessor designs such as IBM’s PERCS Multiprocessor, Intel’s Runnemede Extreme-Scale Multiprocessor, Illinois Cedar, and Stanford DASH. He has graduated 49 PhDs, who are now leaders in academia or industry.