This project will create a dynamic ML ecosystem to characterize electrical performance of each net in a given PCB/package layout file with confidence bounds and leverage pre-PD simulation to collect training data. The use of stochastic collocation to will be used to account for manufacturing tolerance and nets will be ranked in descending order of SI performance to determine any bottleneck in the system.
Project PIs: Xu Chen, Madahavan Swaminathan
Research Thrust: Design and System Optimization; Modeling and Simulation; Verification
Research Timeline Jan 1, 2019 – Dec 31, 2020