CAEML Director Rosenbaum Presents Keynote at MWSCAS
4 Sept 19 In August, CAEML director Elyse Rosenbaum presented a keynote lecture “Machine Learning for Design Efficiency” at the Midwest Symposium on Circuits and Systems (MWSCAS 2019) in Dallas, TX. A copy of her presentation slides may be found here.
CAEML Center PI Paul Franzon on Panel at 2019 IEEE International Microwave Symposium
15 July 19 A Panel on “AI Friend or Foe” was presented at the 2019 IEEE International Microwave Symposium on June 4. In addition to CAEML PI and NCSU Site Director Paul Franzon, panelists included:Taylor Hogan, Cadence Design Systems
- Thomas Rondeau, program manager, Defense Advanced Research Projects Agency (DARPA)
- Sankalp Modi, MathWorks
- Ron Rohrer, Southern Methodist University
- Moderators: Osama Shanaa, MediaTek, and Prof. Francois Rivet, University of Bordeaux
A recap of the panel is available on the EET Asia website https://www.eetasia.com/news/article/AI-Friend-or-Foe
Design Con Interview of Paul Franzon
7 March 19 CAEML NCSU Site Director Paul Franzon was interviewed at Design Con by Sierra Circuits about his work in machine learning in the electrics industry and CAEML research and projects. The interview video is available through YouTube. https://youtu.be/PRKUKqMJGl8
CAEML Director Rosenbaum on ISQED Syposium 19 Panel
6 Feb 19 CAEML Director Elyse Rosenbaum will be part of a panel at 20th International Symposium on Quality Electronic Design (ISQED) in Santa Clara, CA March 6 and 7th. The panel “Hype or hope: Is machine learning the next generation of design and design automation?” also features Mark Ren, NVIDIA, Noel Menezes, Intel, Pradiptya Ghosh, Mentor Graphics and Sachin Sapatnekar University of Minnesota. A full announcement about the conference is available from The Daily Telescope.
CAEML at DesignCon – a New Machine Learning Track
19 Dec 18 See the article and announcement from CAEML Industry Advisory Board Chair Chris Cheng, HPE here https://www.designnews.com/content/machine-learning-designcon-2019-get-details/45682803959962
Hakki Torun wins Best Student Paper Award at EPEPS 2018
19 Oct 18 Hakki Torun, graduate student at Georgia Tech working on the CAEML project Optimization of Power Delivery Networks for Maximizing Signal Integrity, won the Best Student Paper Award at the IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) held October 14-17 in San Jose. The paper “Bayesian Active Learning for Uncertainty Quantification of High-Speed Channel Signaling” was coauthored by CAEML Industry members Jose Hejase, Junyan Tang and Dale Becker from IBM, and GaTech CAEML Site Director Madhavan Swaminaathan.
CAEML in the News:
1/31/18 EE Times AI Expands Role in Design: EDA’s CAEML grows more humps
Machine Learning Offers Helping Hand To Edit Chips Electronic Design July 6, 2017
3/23/17 – The most recent CAEML UPDATE newsletter is now available!
AI Tapped to Improve Design: EE Times 2/3/17
Andreas Cangellaris gave the keynote, Paul Franzon and Madhavan Swaminathan gave a workshop titled ML for Hardware Design and Jose Schutt-Aine presented a tutorial titled High-Speed Circuit Modeling and Design Using X Paramaters at EDAPS in China Dec 14-16, 2017
Elyse Rosenbaum’s keynote at DesignCon 2017, February 1, 2017:
Introductory Machine Learning Tutorial webinar by Maxim Raginsky
March 14, 2017 noon-1pm EDT (11am-noon CDT)
For member universities and IAB members