This project aims to build machine learning models and develop associated tools to predict PPA (power/performance/area) given an RTL description of a circuit, eliminating the need to undertake the lengthy physical design process. Using the predicted PPA results, designers can fix and/or improve RTL in turn. The inputs to the model include the target technology specs (e.g., technology node, supply voltage, target frequency), netlist info (e.g., number of IPs/gates/nets, connectivity), physical design options (e.g., footprint, placement density, P&R algorithms, clock/power network options), and other key features that will help improve the prediction accuracy.
Project PI: Sungkyu Lim
Research Thrust: Design and System Optimization
Research timeline: January 1, 2019 – December 31, 2020